Semiconductor integrated circuits (ICs) are typically mounted in or on a printed circuit board (PCB) as part of a packaging process for making an electrical assembly. For electrical ICs, individual metal electrical conductors are typically used to make electrical connections between first metal pads on the IC and second metal pads on the PCB as part of a process referred to in the art as “electrical conductor bonding.”
The need for high-bandwidth communication with electrical ICs has prompted the addition of optical waveguide connections between optical+electrical ICs (“OE-ICs”) and OE-PCBs that have both optical and electrical functionality and optical and electrical connection locations. Like the electrical conductor bonding of electrical ICs, optical electrical conductor bonding along with the electrical conductor bonding is performed between OE-ICs and OE-PCBs to form a photonic assembly.
Arrays of solder bumps are now being used to form electrical connections between electronic PCBs and electronic ICs in a “flip chip” configuration. Approaches for making the optical interconnections in a flip chip configuration include using individual optical fibers or micro-optics to define free-space optical paths. Unfortunately, these approaches suffer from serious alignment issues that make them relatively low yield and difficult to implement. Differences in the coefficient of thermal expansion (CTE) of the materials used for the different components of the photonic assembly can also lead to stresses and strains that can adversely affect the performance of the photonic assembly.